PhD Student | Electrical Engineer | Maker | Programmer | Nerd
Hi, I'm Alec (technically), but I've gone by my middle name, Max, my entire life. I'm currently a PhD student in electrical engineering at The University of Texas at Dallas . I work as research assistant in the Predictive Analytics and Technologies (PAT) Laboratory under the Advisement of Dr. Mehrdad Nourani . I also assist with various electrical and computer engineering classes as a teaching assistant. In my free time, I enjoy 3D printing, juggling, and spending time with my cats.
I'm currently a PhD student in electrical engineering at The University of Texas at Dallas, where I am a member of the Predictive Analytics and Technologies Laboratory under the advisement of Dr. Mehrdad Nourani. Before moving to Texas, I studied at the University of Wisconsin-Platteville and received my B.S. in electrical engineering with a computers emphasis.
My research focuses on different ways of quantifying human ambulation (how people do/don't move) in a hospital environment using machine learning. I have approached this problem from many angles, including using a real-time location system, wrist-worn devices that collect biosignals, depth cameras, and RGB cameras.
I've always been interested in computers and their inner-workings. This interest naturally let to pursuing a career in electrical engineering. When given the choice, I always choose classes related to machine learning, microprocessors, computer architecture, signal processing, and programming.
Currently, I am working on a deep neural network-based approach to identify and track people and objects of interest. I am using the neural network data to extract the features used for classification with k nearest neighbor algorithms. The target classifications are static or moving as well as various postures/activities (e.g. lying on bed, sitting on chair, or standing).
During my undergraduate studies, I used a deep neural network to determine parking lot occupancy on a space-by-space basis and created a speech activity detector.
A full list of my publications can be found in my Curriculum Vitae.
I have been a teaching assistant at The University of Texas at Dallas since the beginning of 2019. This has been one of the most fulfilling experiences of my academic career. I have aided professors by lecturing, laboratory assignment design and modification, one-on-one student tutoring, review sessions, software documentation, video tutorials, and grading. My work as a teaching assistant has helped me solidify my own knowledge through teaching others. About a year after I started as a teaching assistant, I received the award for the best teaching assistant in the Jonnson School of Engineering and Computer Science. I'm working towards an advanced graduate teaching certificate.
I have taught several courses ranging from introductory digital logic courses, to graduate level microprocessor courses.
| Course | Focus |
|---|---|
| EE3201 — Introduction to Digital Dystems | Basic logic gates and circuits, boolean simplification, and MIPS assembly |
| EE3201 — Electrical and Computer Engineering Fundamentals-I Laboratory | Hands-on experience with testing equipment, small circuits, and MSP432 microcontrollers |
| EE3320 — Digital Circuits | Sequential logic and state machines |
| EEDG6301 — Advanced Digital Logic | Multi-output logic functions and asynchronous sequential circuits |
| EEDG6302 — Microprocessor and Embedded Systems | Microprocessor-specific, ARM, and MSP430 architecture and MSP430 programming |
I have done my best to select graduate courses that interest me as often as possible. Below is a list of these courses and the key points from each.
| Course | Focus |
|---|---|
| CS6301 — Machine Learning for Engineers and Scientists |
Covered main types of machine learning algorithms (KNN, SVM, HMM, CNN, etc.). Final Project: Comparison of different support vector machine kernels and parameters. |
| EEDG6370 — Design and Analysis of Reconfigurable Systems |
Focused on the architecture of reconfigurable devices (mainly FPGAs) as
well as the algorithms required to implement digital logic on an FPGA Final Project: Design and implementation of an 8-bit microprocessor on an FPGA using Xilinx high-level synthesis. |
| EESC6363 — Digital Image Processing |
Covered 2D fourier transforms, image sampling, image wavelet transforms,
edge detection, and image segmentation Final Project: Training, implementation and comparison of deep neural network algorithms for heart rate detection in video |
| EEDG6302 — Microprocessor and Embedded Systems |
Covered microprocessor-specific, ARM, and MSP430 architecture and MSP430
programming Final Project: Design and implementation of an 8-bit microprocessor in VHDL |
| EEDG6303 — Testing and Testable Design | Covered fault detection, test pattern generation, built-in self-test, and using Synopsys Tetramax |
| EESC6360 — Digital Signal Processing I |
Covered discrete z-transforms, Fourier
transofrms,fast Fourier transforms, and digital filters Final Project: Prediction of sun spot activity |
| EEDG6301 — Advanced Digital Logic | Covered multi-output logic functions and asynchronous sequential circuits as well as analysis of digital logic using Synopsys tools |
The best way to contact me is via email. I can be reached at [email protected]
I can also be found on Google Scholar, LinkedIn, and GitHub at the links below.
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i = 0;
while (!deck.isInOrder()) {
print 'Iteration ' + i;
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}
print 'It took ' + i + ' iterations to sort the deck.';| Name | Description | Price |
|---|---|---|
| Item One | Ante turpis integer aliquet porttitor. | 29.99 |
| Item Two | Vis ac commodo adipiscing arcu aliquet. | 19.99 |
| Item Three | Morbi faucibus arcu accumsan lorem. | 29.99 |
| Item Four | Vitae integer tempus condimentum. | 19.99 |
| Item Five | Ante turpis integer aliquet porttitor. | 29.99 |
| 100.00 | ||
| Name | Description | Price |
|---|---|---|
| Item One | Ante turpis integer aliquet porttitor. | 29.99 |
| Item Two | Vis ac commodo adipiscing arcu aliquet. | 19.99 |
| Item Three | Morbi faucibus arcu accumsan lorem. | 29.99 |
| Item Four | Vitae integer tempus condimentum. | 19.99 |
| Item Five | Ante turpis integer aliquet porttitor. | 29.99 |
| 100.00 | ||